On-Chip Networks, Second Edition (Synthesis Lectures on Computer Architecture) [9783031006272]

Overview

This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.

The book, On-Chip Networks, Second Edition (Synthesis Lectures on Computer Architecture) [Bulk, Wholesale, Quantity] ISBN#9783031006272 in Paperback by Natalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh may be ordered in bulk quantities. Minimum starts at 25 copies. Availability based on publisher status and quantity being ordered.